![]() ![]() My hardware designs are open source, and my blog is advert free. I love FPGAs and want to help more people discover and use them in their projects. If you like what I do, consider sponsoring me on GitHub. Multiplication with FPGA DSPs - efficient multiplication with DSPs.Fixed-Point Numbers in Verilog - precision without complexity.Verilog Vectors and Arrays (coming soon).Numbers in Verilog (this post) - introduction to numbers in Verilog. ![]() ![]() Get in touch: GitHub Issues, 1BitSquared Discord, (Mastodon), (Twitter) Series Outline This post was completely revised in November 2022. In this first post, we consider integers, dig into the challenges of signed numbers and expressions, and then finish with a bit of arithmetic. This series begins with the basics of Verilog numbers, then considers fixed-point, division, square roots and CORDIC before covering more complex algorithms, such as data compression. Welcome to my ongoing series covering mathematics and algorithms with FPGAs.
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